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Silicon Labs /Series0 /EZR32HG /EZR32HG320F64R67 /TIMER0 /STATUS

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Interpret as STATUS

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https://regviz.com/r/Silicon Labs/Series0/EZR32HG/EZR32HG320F64R67/TIMER1/STATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RUNNING)RUNNING 0 (DIR)DIR 0 (TOPBV)TOPBV 0 (CCVBV0)CCVBV0 0 (CCVBV1)CCVBV1 0 (CCVBV2)CCVBV2 0 (ICV0)ICV0 0 (ICV1)ICV1 0 (ICV2)ICV2 0 (CCPOL0)CCPOL0 0 (CCPOL1)CCPOL1 0 (CCPOL2)CCPOL2

Description

Status Register

Fields

RUNNING

Running
DIR

Direction
TOPBV

TOPB Valid
CCVBV0

CC0 CCVB Valid
CCVBV1

CC1 CCVB Valid
CCVBV2

CC2 CCVB Valid
ICV0

CC0 Input Capture Valid
ICV1

CC1 Input Capture Valid
ICV2

CC2 Input Capture Valid
CCPOL0

CC0 Polarity
CCPOL1

CC1 Polarity
CCPOL2

CC2 Polarity

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data